The present invention relates to an insulated gate type semiconductor apparatus such as a power MOSFET, an IGBT (Insulated Gate Bipolar Transistor), and the like. Particularly, the invention relates to methods of realizing high-speed operation, negative gate voltage protection and prevention of a breakdown voltage drop of an insulated gate type semiconductor apparatus having a control circuit which includes an over-heating protection circuit, an over-current protection circuit, and the like on the same chip.
A technique in which an over-heating protection circuit is mounted on the same chip for improving the reliability of a power MOSFET is disclosed in Japanese Patent Application Laid-Open (JP-A) No. 7-58293. According to the conventional technique, a gate resistor is connected between an outside gate terminal and an inside gate terminal and an MOSFET for the protection circuit is connected between the inside gate terminal and an outside source terminal. When the temperature of the chip rises to a specified temperature or higher, the MOSFET for the protection circuit is turned on and a gate current flows in the resister, thereby enabling the power MOSFET to be turned off before the power MOSFET is broken.
The conventional technique relates to a self-isolation-structured device in which a control circuit is formed in a drain region of the power MOSFET in order to suppress increase of the number of processing steps. Consequently, the costs are suppressed. However, there is a problem such that when the gate voltage becomes negative, a leakage current flows from an outside drain terminal to the outside gate terminal through a parasitic npn transistor existing between the drain of the MOSFET for the protection circuit and the drain of the power MOSFET. In the conventional technique, therefore, as a countermeasure against the problem, a diode for cutting off the base current of the parasitic npn transistor is connected in series to the MOSFET for the protection circuit and, further, a diode for preventing breakdown of the above diode is connected between the outside gate terminal and the outside source terminal.
Another technique using an MOSFET in place of the gate resistor to increase the frequency of a power MOSFET having therein an over-heating protection circuit is disclosed in JP-A-6-244414. According to the conventional technique, an MOSFET in which the potential of the body is fixed to a source terminal voltage is used in place of a gate resistor between the outside gate terminal end the inside gate terminal.
In the conventional semiconductor apparatus disclosed in the above-mentioned JP-A-7-58293, a negative gate voltage protection for preventing operation of the parasitic npn transistor when the source and the drain of the MOSFET for the protection circuit are not connected to the source terminal of the power MOSFET is not considered. The conventional technique also has problems such that the power MOSFET cannot be completely turned off due to the drop of the voltage of the diode since the diode is inserted between the gate terminal and the source terminal, and the minimum gate terminal voltage for normally operating control circuits such as the over-heating protection circuit and the like cannot be decreased.
Further, in the conventional technique using the MOSFET in place of the gate resistor to realize the high-speed operation disclosed in JP-A-6-244414, it is not described that the body potential is controlled to reduce the on-resistance.